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ZL30406

Part Number	ZL30406
Manufacturer	Zarlink
Description	SONET/SDH Clock Multiplier PLL
Published	May 21, 2005
Detailed Description	ZL30406 SONET/SDH Clock Multiplier PLL Data Sheet Features • • • • Meets jitter requirements of Telcordia GR-253CORE for...
Datasheet	ZL30406 PDF File

Overview

ZL30406 SONET/SDH Clock Multiplier PLL Data Sheet Features • • • • Meets jitter requirements of Telcordia GR-253CORE for OC-48, OC-12, and OC-3 rates Meets jitter requirements of ITU-T G.
813 for STM16, STM-4 and STM-1 rates Provides four LVPECL differential output clocks at 77.
76 MHz Provides a CML differential clock programmable to 19.
44 MHz, 38.
88 MHz, 77.
76 MHz and 155.
52 MHz Provides a single-ended CMOS clock at 19.
44 MHz Provides enable/disable control of output clocks Accepts a CMOS reference at 19.
44 MHz 3.
3 V supply Ordering Information ZL30406QGC 64 Pin TQFP ZL30406QGC1 64 Pin TQFP* *Pb Free Matte Tin -40° C to +85 ° C Trays Trays February 2005 Description The ZL30406 is an analog phase-locked loop (APLL) designed to provide rate conversion and jitter attenuation for SDH (Synchronous Digital Hierarchy) and SONET (Synchronous Optical Network) networking equipment.
The ZL30406 generates very low jitter clocks that meet the jitter requirements of Telcordia GR-253-CORE OC-48, OC-12, OC-3, OC-1 rates and ITU-T G.
813 STM-16, STM-4 and STM-1 rates.
The ZL30406 accepts a CMOS compatible reference at 19.
44 MHz and generates four LVPECL differential output clocks at 77.
76 MHz, a CML differential clock programmable to 19.
44 MHz, 38.
88 MHz, 77.
76 MHz and 155.
52 MHz and a single-ended CMOS clock at 19.
44 MHz.
The output clocks can be individually enabled or disabled.
• • • • Applications • • SONET/SDH line cards Network Element timing cards LPF C77oEN-A C77oEN-B OC-CLKoEN C77o ,C155o C19o, C38o, CML-P/N outputs OC-CLKoP/N C19i Frequency & Phase Detector 19.
44MHz BIAS Reference & Bias circuit Loop Filter Output VCO Interface Circuit C77oP/N-A C77oP/N-B C77oP/N-C C77oP/N-D C19o VDD GND VCC FS1-2 C19oEN C77oEN-C C77oEN-D 15 Figure 1 - Functional Block Diagram 1 Zarlink Semiconductor Inc.
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.
Copyright 2003-2005, Zarlink Semiconductor Inc.
All Rights Reserved.
ZL30406 ...

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