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3SK322

Hitachi Semiconductor
Part Number 3SK322
Manufacturer Hitachi Semiconductor
Description Silicon N-Channel Dual Gate MOS FET
Published Mar 30, 2005
Detailed Description 3SK322 Silicon N-Channel Dual Gate MOS FET ADE-208-712A (Z) 2nd. Edition Dec. 1998 Application UHF / VHF RF amplifier ...
Datasheet PDF File 3SK322 PDF File

3SK322
3SK322

Overview
3SK322 Silicon N-Channel Dual Gate MOS FET ADE-208-712A (Z) 2nd.
Edition Dec.
1998 Application UHF / VHF RF amplifier Features • Low noise figure.
NF = 1.
0 dB typ.
at f = 200 MHz • Capable of low voltage operation • Provide mini mold packages; MPAK-4R(SOT-143 var.
) Outline 3SK322 Absolute Maximum Ratings (Ta = 25°C) Item Drain to source voltage Gate 1 to source voltage Gate 2 to source voltage Drain current Channel power dissipation Channel temperature Storage temperature Symbol VDS VG1S VG2S ID Pch Tch Tstg Ratings 12 ±8 ±8 25 150 150 –55 to +150 Unit V V V mA mW °C °C Attention: This device is very sensitive to electro static discharge.
It is recommended to adopt appropriate cautions when handling this transistor.
2 3SK322 Electrical Characteristics (Ta = 25°C) Item Symbol Min 12 ±8 ±8 — — 0.
5 0 0 16 2.
4 0.
8 — 22 — 12 — — Typ — — — — — — — — 20 2.
9 1.
0 0.
023 25 1.
0 15 3.
2 2.
8 Max — — — ±100 ±100 10 +1.
0 +1.
0 — 3.
4 1.
4 0.
04 — 1.
8 — 4.
5 3.
5 Unit V V V nA nA mA V V mS pF pF pF dB dB dB dB dB VDS = 6 V, VG2S = 3V, I D = 10 mA, f = 60 MHz VDS = 6 V, VG2S = 3V, I D = 10 mA, f = 900 MHz VDS = 6 V, VG2S = 3V, I D = 10 mA, f = 200 MHz Test conditions I D = 200 µA , VG1S = –3 V, VG2S = –3 V I G1 = ±10 µA, VG2S = VDS = 0 I G2 = ±10 µA, VG1S = VDS = 0 VG1S = ±6 V, VG2S = VDS = 0 VG2S = ±6 V, VG1S = VDS = 0 VDS = 6 V, VG1S = 0.
75V, VG2S = 3 V VDS = 10 V, VG2S = 3V, I D = 100 µA VDS = 10 V, VG1S = 3V, I D = 100 µA VDS = 6 V, VG2S = 3V, I D = 10 mA, f = 1 kHz VDS = 6 V, VG2S = 3V, I D = 10 mA, f = 1 MHz Drain to source breakdown voltage V(BR)DSX Gate 1 to source breakdown voltage Gate 2 to source breakdown voltage Gate 1 cutoff current Gate 2 cutoff current Drain current Gate 1 to source cutoff voltage Gate 2 to source cutoff voltage Forward transfer admittance Input capacitance Output capacitance Reverse transfer capacitance Power gain Noise figure Power gain Noise figure Noise figure Note: Marking is “ZW–” V(BR)G1SS V(BR) G2SS I G1SS I G2SS I DS(on) VG1S(off) VG2S(off) ...


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